I
Design Verification Engineer
External job listingat Infoobjects
Requirements 5–15 Years Strong hands-on experience with SystemVerilog (SV) and UVM Expertise in AXI/AMBA protocols Experience with NoC (Network-on-Chip), Crossbar, and interconnects Perfo...
External source - not verified6 days agoOpen until: Jan 25, 2027
Salary
Not provided
Location
San Jose, United States
Employment type
Full time
Workplace
Not provided
Design Verification Engineer
San Jose, United States
Job description
Requirements
- 5–15 Years
- Strong hands-on experience with SystemVerilog (SV) and UVM
- Expertise in AXI/AMBA protocols
- Experience with NoC (Network-on-Chip), Crossbar, and interconnects
- Performance verification and high-performance IP verification
- Regression execution, debugging/triage, and coverage closure
- Scripting experience with Python, Perl, and Make
- ASIC/SoC design verification experience
- Familiarity with Amazon tools, workflows, and verification methodologies is a plus
- Only Local Candidates
Schedule
- 100% Onsite
- Immediate Hiring
How to apply
- Share your resume by email
Location
- San Jose, CA