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Senior ASIC/SoC RTL Design Engineer
External job listingat Fornaxtech
About the role Support an RTL reverse engineering and design analysis project. Requirements 10+ years of experience in ASIC/SoC RTL design or digital design. Strong hands-on experience wi...
External source - not verifiedyesterdayOpen until: Jan 27, 2027
Salary
Not provided
Location
San Diego, United States
Employment type
Temporary
Workplace
Not provided
Senior ASIC/SoC RTL Design Engineer
San Diego, United States
Job description
About the role
Support an RTL reverse engineering and design analysis project.
Requirements
- 10+ years of experience in ASIC/SoC RTL design or digital design.
- Strong hands-on experience with Verilog and SystemVerilog.
- Expertise in digital logic design, microarchitecture, FSMs, datapaths, registers, and control logic.
- Experience analyzing complex RTL codebases and tracing control/data paths.
- Strong knowledge of RTL simulation, debugging, and waveform analysis.
- Ability to document design functionality, dependencies, and architectural behavior.
- Willingness to relocate temporarily to San Diego, CA, for 2–3 months and work on-site.
Schedule
- 2–3 Months (Temporary Relocation Required)
- On-site
How to apply
- Share your updated résumé by email.
Location
- San Diego, CA