Verilog Writer / RTL Design Engineer
Published on CazVidat Odixcity Consulting
We are seeking a Verilog Writer / RTL Design Engineer for a full-time role based in the Philippines. The position focuses on RTL design and coding, simulation a
Salary
$18,000 per year
Location
Philippines
Employment type
Full time
Workplace
Remote
Verilog Writer / RTL Design Engineer
$18,000 per year
Job description
We are seeking a Verilog Writer / RTL Design Engineer for a full-time role based in the Philippines. The position focuses on RTL design and coding, simulation and testbench development, and work within FPGA or ASIC design flows. Compensation is USD $18,000 per year. Key Responsibilities Write RTL using Verilog and SystemVerilog. Develop RTL designs and code. Develop simulations and testbenches. Work with FPGA or ASIC design flows. Required Qualifications Bachelor’s degree in electrical engineering, computer engineering, or a related field, or equivalent experience. Knowledge of Verilog and SystemVerilog. Skills in RTL design and coding. Experience with simulation and testbench development. Familiarity with FPGA or ASIC design flows. Fully remote - work from anywhere in Philippines