SOC Power Design Engineer
Aviso de fuente externaen Qualcomm
Qualcomm seeks an ASIC Engineer to define, design, verify, validate, implement, and document IP development for high-performance products.
Salario
No especificado
Ubicación
Tijuana, México
Tipo de empleo
Tiempo completo
Modalidad
No especificado
SOC Power Design Engineer
Tijuana, México
Descripción del empleo
About the role
As a Qualcomm ASIC Engineer, you will contribute to IP (block/SoC) development for high-performance, high-quality, low-power products. Qualcomm pushes the boundaries of technology to enable next-generation experiences and transform communication and data processing.
Responsibilities
- Define, model, design, optimize, verify, validate, implement, and document IP development.
- Create architectures, circuit specifications, logic designs, and system simulations based on system-level requirements.
- Collaborate with cross-functional groups to determine product execution paths.
Requirements
- Bachelor's degree in science, engineering, or a related field and 2+ years of ASIC design, verification, validation, integration, or related work experience; or a master's degree in science, engineering, or a related field and 1+ year of related work experience; or a PhD in science, engineering, or a related field.
- Preferred: master's degree in electrical/electronic engineering, computer engineering, or computer science.
- Preferred: 3+ years of ASIC design, verification, validation, integration, or related work experience.
- Preferred: 2+ years of experience with architecture and design tools, scripting tools and programming languages, and design verification methods.
Datos clave
- The role focuses on ASIC and IP (block/SoC) development.
- A bachelor's degree and 2+ years of related work experience, a master's degree and 1+ year, or a PhD are listed as minimum qualifications.
- Preferred qualifications include experience with architecture and design tools, scripting tools and programming languages, and design verification methods.
Preguntas frecuentes
What does the role involve?
The role involves defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP development.
What are the minimum qualifications?
A bachelor's degree in science, engineering, or a related field with 2+ years of related work experience, a master's degree with 1+ year, or a PhD in science, engineering, or a related field.
Which qualifications are preferred?
A relevant master's degree and experience with ASIC development, architecture and design tools, scripting tools and programming languages, and design verification methods are preferred.