Design Verification Engineer

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📢 WE’RE HIRING: Design Verification Engineer 📍 Location: San Jose, CA — Onsite ⚠️ Local candidates only We are looking for an experienced Design Verification Engineer to join an AI hard...

External source - not verified13 hours agoOpen until: Jan 13, 2027

Salary

Not provided

Location

San Jose, United States

Employment type

Full time

Workplace

Not provided

Design Verification Engineer

San Jose, United States

Job description

📢 WE’RE HIRING: Design Verification Engineer
📍 Location: San Jose, CA — Onsite
⚠️ Local candidates only
We are looking for an experienced Design Verification Engineer to join an AI hardware startup developing specialized chips for AI applications.
Key Responsibilities:
Own verification of one or more hardware IP subsystems.
Develop and maintain UVM/SystemVerilog-based verification environments.
Validate hardware functionality, performance, and compliance with specifications.
Collaborate with IP vendors, RTL designers, and SoC integration teams.
Drive coverage closure and verification sign-off.
Experience Required: 8+ years in Design Verification.
📩 Interested candidates: Please share your updated resume
#Hiring #DesignVerification #ASIC #SystemVerilog #UVM #HardwareVerification #SanJoseJobs

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