Senior RTL / STA Engineer

We are seeking a Senior RTL / STA Engineer for a contract role in San Jose, California. The position focuses on RTL design and timing closure, static timing analysis, ASIC timing constraints, and related scripting. Key Responsibilities Apply RTL design and timing-closure expertise. Perform Static Timing Analysis (STA). Work with ASIC timing constraints, including SDC constraints. Use synthesis tools in support of RTL and timing work. Use at least two of the following for scripting: Perl, Tcl, Python, or Makefile. Required Qualifications Skills in RTL design and timing closure. Experience with Static Timing Analysis (STA) and ASIC timing constraints. Knowledge of SDC constraints and synthesis tools. Scripting proficiency in at least two of Perl, Tcl, Python, or Makefile. Position Details Employment type: Contract Location: San Jose, California, United States Compensation: $80 per hour (USD)