Design Verification Lead Engineer

At Tech do Quest, a pioneering technology company based in Redmond, Washington, we are expanding our innovative engineering team. We're looking for a highly skilled Design Verification Lead Engineer to join us onsite and lead the verification efforts of our cutting-edge design projects. This full-time role offers a competitive salary of $140,000 per year, comprehensive health insurance, paid time off, and a retirement plan. Join our collaborative environment where your leadership will directly influence product quality and lifecycle success, while advancing your career through continuous learning and mentorship opportunities. Key Responsibilities Lead the design verification process by developing and executing detailed verification plans aligned with project goals and timelines. Design and implement system-level testbenches using System Verilog and UVM to ensure thorough functional validation. Integrate verification IP (VIP) and develop comprehensive coverage coding to guarantee exhaustive testing and compliance with industry standards. Utilize Verilog and VHDL for accurate modeling and simulation of complex designs, ensuring early detection of issues. Perform root cause analysis and debugging of design discrepancies, collaborating closely with design and validation teams to resolve issues promptly. Collaborate cross-functionally with design, validation, and software engineering teams to align verification strategies with overall product development. Mentor and guide junior engineers, fostering a culture of technical excellence and continuous improvement within the team. Drive project completion by managing verification schedules, resources, and reporting progress to stakeholders. What We're Looking For Required: Bachelor's Degree in Engineering or a related technical field. Minimum 5 years of experience in design verification or a closely related role. Strong expertise in System Verilog, UVM, testbench development, and VIP integration. Proficiency in Verilog, VHDL, and AMBA protocol standards. Demonstrated skills in debugging, root cause analysis, and coverage coding. Proven leadership ability to effectively manage teams and drive projects to successful completion. Preferred: Experience mentoring junior engineers and fostering team growth. Familiarity with advanced verification methodologies and industry best practices. Strong communication and collaboration skills within cross-functional teams. Passion for continuous learning and professional development. What We Offer Competitive salary of $140,000 per year with performance bonuses. Comprehensive health insurance including medical, dental, and vision coverage. Paid time off to support work-life balance and personal wellness. Robust retirement plan options to secure your financial future. Opportunities for career development and advancement within a growing company. Collaborative, innovative onsite work environment in Redmond, Washington. Access to cutting-edge tools and technologies to support your technical growth. Frequently Asked Questions Is this position onsite or remote? This role is onsite at our Redmond, Washington office. We value close collaboration and hands-on leadership. What is the expected work schedule? This is a full-time position with standard business hours, with flexibility as needed to meet project deadlines. What qualifications are essential for this role? A Bachelor’s degree in Engineering, 5+ years in design verification, and strong skills in System Verilog, UVM, Verilog, and VHDL are required. Does Tech do Quest provide professional development? Yes, we encourage continuous learning and provide mentorship and training opportunities to support your career growth. Are there opportunities for advancement? Absolutely. We promote from within and value leadership development for our engineers. What benefits are included? Our benefits package includes health insurance, paid time off, and a retirement plan, among other perks. Apply Today Ready to take the l