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DFT Engineer
External job listingat Iintech
Requirements 5+ yrs DFT MBIST – Siemens Tessent Scan compression & ATPG (TestKompress, TetraMAX) Gate-level sim & debug ATE debug & silicon bring-up VTRAN pattern translation Verilog/SV +...
External source - not verified3 weeks agoOpen until: Jan 10, 2027
Salary
Not provided
Location
San Jose, United States
Employment type
Full time
Workplace
Not provided
DFT Engineer
San Jose, United States
Job description
Requirements
- 5+ yrs DFT
- MBIST – Siemens Tessent
- Scan compression & ATPG (TestKompress, TetraMAX)
- Gate-level sim & debug
- ATE debug & silicon bring-up
- VTRAN pattern translation
- Verilog/SV + Tcl/Perl/Python
- PrimeTime STA (CDC, clock gating, constraints) is a bonus
- Must be authorized to work in the US (W2 only)
Schedule
- W2 Contract
- 6 Months+
How to apply
- Send your resume by email
Location
- San Jose, CA (Onsite)