Design Verification Lead Engineer in Redmond, WA

Join Tech do Quest as a Design Verification Lead Engineer in Redmond, Washington. This onsite, full-time role offers a chance to lead verification efforts on complex design projects, ensuring top-tier quality and performance. Key Responsibilities Lead and manage the design verification process by creating and executing detailed verification plans. Design and implement system-level testbenches using System Verilog and UVM to validate design functionality. Integrate verification IP (VIP) and develop coverage coding to guarantee thorough testing. Utilize Verilog and VHDL for accurate modeling and simulation of hardware designs. Perform root cause analysis and debugging to resolve design issues efficiently. Collaborate closely with cross-functional teams including design, validation, and software engineering groups. Mentor junior engineers, promoting continuous improvement and technical excellence within the team. Required and Preferred Qualifications Bachelor's Degree in Engineering or related technical field. Strong expertise in System Verilog, UVM, testbench development, and VIP integration. Proficient in Verilog, VHDL, and AMBA protocol standards. Demonstrated skills in debugging and coverage coding methodologies. Proven leadership abilities with at least 5 years of experience in design verification or a related role. At Tech do Quest, we foster a culture of growth, mentorship, and innovation. You will work in a collaborative environment with opportunities for professional development and career advancement. This role is onsite in Redmond, Washington, and offers a competitive salary of $140,000 per year.