Design Verification Lead Engineer in Redmond, WA

Published on CazVidat Tech do Quest

Apply for Design Verification Lead Engineer at Tech do Quest in Redmond, WA. Lead verification projects with System Verilog, UVM, Verilog, and VHDL. Full-time o

Verified by CazVid6 months agoDeadline passed: Feb 16, 2026

Salary

$140,000 per year

Location

Redmond, Washington, United States

Employment type

Full time

Workplace

Not provided

Design Verification Lead Engineer in Redmond, WA

$140,000 per year

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Job description

Join Tech do Quest as a Design Verification Lead Engineer in Redmond, Washington. This onsite, full-time role offers a chance to lead verification efforts on complex design projects, ensuring top-tier quality and performance. Key Responsibilities Lead and manage the design verification process by creating and executing detailed verification plans. Design and implement system-level testbenches using System Verilog and UVM to validate design functionality. Integrate verification IP (VIP) and develop coverage coding to guarantee thorough testing. Utilize Verilog and VHDL for accurate modeling and simulation of hardware designs. Perform root cause analysis and debugging to resolve design issues efficiently. Collaborate closely with cross-functional teams including design, validation, and software engineering groups. Mentor junior engineers, promoting continuous improvement and technical excellence within the team. Required and Preferred Qualifications Bachelor's Degree in Engineering or related technical field. Strong expertise in System Verilog, UVM, testbench development, and VIP integration. Proficient in Verilog, VHDL, and AMBA protocol standards. Demonstrated skills in debugging and coverage coding methodologies. Proven leadership abilities with at least 5 years of experience in design verification or a related role. At Tech do Quest, we foster a culture of growth, mentorship, and innovation. You will work in a collaborative environment with opportunities for professional development and career advancement. This role is onsite in Redmond, Washington, and offers a competitive salary of $140,000 per year.

Frequently asked questions

  • Is this position remote or on-site?

    This role is onsite in Redmond, Washington, so you will need to work from the company's location.

  • What is the salary for this Design Verification Lead Engineer role?

    The salary for this position is USD 140,000 per year.

  • What kind of experience do I need to qualify for this job?

    You should have at least 5 years of experience in design verification or a related role, with strong skills in System Verilog, UVM, testbench development, and VIP integration.

  • What are the main responsibilities of this role?

    You will lead and manage the design verification process, create and execute verification plans, design system-level testbenches, perform debugging, and mentor junior engineers.

  • What technical skills are required for this position?

    Proficiency in System Verilog, UVM, Verilog, VHDL, AMBA protocol standards, debugging, and coverage coding methodologies are required.

  • Does this company offer opportunities for professional growth?

    Yes, Tech do Quest fosters a culture of growth, mentorship, and innovation, with opportunities for professional development and career advancement.

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