Performance Engineer, Hardware

About the role

River AI is creating personal AI owned and shaped by each individual by rewriting the entire stack, including personal hardware for local inference, custom training infrastructure, next-generation UIs, and frontier deep learning research.

River AI seeks exceptional hardware performance engineers to architect, model, and correlate high-performance custom silicon. The role develops high-fidelity simulators to predict how an AI accelerator architecture and SoC system handle real-world AI models. It includes ownership of performance models, ISA and kernel optimization, and FPGA emulators for software development, in collaboration with compiler, IR, software, and RTL design teams.

Responsibilities

• Design and implement high-performance and functional models of complex hardware using C++ and/or SystemC.
• Conduct what-if studies of architectural changes, including cache sizes, branch predictors, pipeline depths, scatter/gather, and matmul shaping, and evaluate their impact on IPC, MFU, TTFT, and total execution time.
• Analyze and profile AI kernels and software stacks to generate representative traces that stress-test hardware models.
• Collaborate with compiler and kernel teams to optimize software mapping to hardware and ensure the architecture supports emerging algorithmic breakthroughs efficiently.
• Validate performance models against RTL and pre-silicon emulators, keeping model accuracy within strict tolerance levels.
• Identify performance bottlenecks.

Requirements

The source listing does not specify requirements.

Key facts

• The role involves architecting, modeling, and correlating high-performance custom silicon.
• The work includes simulator development, architectural studies, workload characterization, and performance correlation.
• The role involves collaboration with compiler, IR, software, kernel, and RTL design teams.