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Physical Design Engineer
External job listingat Itechstack
Requirements 8+ Years RTL-to-GDSII, SoC/ASIC Design, N5/N3 Technology Nodes, Timing Closure, Cadence Genus & Innovus. Open to candidates with valid US work authorization Schedule 100% Ons...
External source - not verified2 weeks agoOpen until: Jan 19, 2027
Salary
Not provided
Location
San Jose, United States
Employment type
Full time
Workplace
Not provided
Physical Design Engineer
San Jose, United States
Job description
Requirements
- 8+ Years
- RTL-to-GDSII, SoC/ASIC Design, N5/N3 Technology Nodes, Timing Closure, Cadence Genus & Innovus.
- Open to candidates with valid US work authorization
Schedule
- 100% Onsite
- W2 / C2C / Full-Time
How to apply
- Share your updated resume by email
Location
- San Jose, CA / Austin, TX