Physical Design Engineer

External job listingat Itechstack

Physical Design Engineer in San Jose, CA or Austin, TX. Requires Cadence Genus and Innovus experience. Send an updated resume by email.

External source - not verified2 weeks agoOpen until: Jan 19, 2027

Salary

Not provided

Location

Austin, United States

Employment type

Full time

Workplace

Not provided

Physical Design Engineer

Austin, United States

Job description

About the role

Support large-scale, timing-critical SoC and AI-class designs at advanced semiconductor technology nodes.

Tasks

  • Perform synthesis using Cadence Genus for complex, timing-critical designs.
  • Drive PPA optimization (Power, Performance, and Area) during synthesis and early implementation.
  • Develop and refine floorplans using Cadence Innovus.
  • Collaborate with RTL and architecture teams on design quality, constraints, and trade-offs.
  • Partner with external Place & Route (P&R) teams to achieve timing closure and optimize PPA.
  • Identify timing bottlenecks early and improve implementation convergence.

Requirements

  • Strong hands-on experience with Cadence Genus and Innovus
  • Expertise in synthesis, floorplanning, timing closure, and PPA optimization
  • Experience with large-scale SoC or AI-class designs
  • Hands-on experience with advanced technology nodes (N5/N3 or below)
  • Strong collaboration skills across RTL, architecture, and Physical Design teams

How to apply

  • Send your updated resume by email.

Location

  • San Jose, CA
  • Austin, TX

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