Silicon Design Package Designer @
Published on CazVidat SRI Tech Solutions
Key Responsibilities & Skills: Tools & Knowledge: Mentor/Siemens and Cadence tools (especially for Package Layout Automation - PLA). Technical Expertise: Multi-
Salary
$120,000 per year
Location
Santa Clara, California, United States
Employment type
Full time
Workplace
Not provided
Silicon Design Package Designer @
$120,000 per year
Job description
Key Responsibilities & Skills: Tools & Knowledge: Mentor/Siemens and Cadence tools (especially for Package Layout Automation - PLA). Technical Expertise: Multi-layer package design experience. Understanding of substrate manufacturing Design Rules and Assembly Rules. Familiarity with SIPI (Signal Integrity & Power Integrity) Rules. Flip-chip package design concepts. Tasks: Perform point-to-point connections. Run DRC (Design Rule Checks), identify root causes, and fix issues. Execute design based on provided schematics, including component placement and constraint setup.
Frequently asked questions
Is this position remote or on-site?
This role is on-site in Santa Clara, California and is not eligible for remote work.
What is the salary for this Silicon Design Package Designer role?
The salary is USD 120,000 per year.
What kind of experience do I need for this job?
You need hands-on experience in multi-layer package design and proficiency with Mentor/Siemens and Cadence tools for Package Layout Automation.
What will my main responsibilities be?
You will perform point-to-point connections within package layouts, run Design Rule Checks, diagnose and resolve design issues, and execute designs based on schematics including component placement and constraint setup.
Are there specific technical skills or knowledge required?
Yes, you should understand substrate manufacturing Design Rules and Assembly Rules, be familiar with SIPI (Signal Integrity & Power Integrity) Rules, and know flip-chip package design concepts.