Silicon Package Design Engineer in Santa Clara, CA

Published on CazVidat SRI Tech Solutions

Join SRI Tech Solutions in Santa Clara as a Silicon Package Design Engineer. Apply multi-layer and flip-chip design, PLA, Cadence, and DRC skills.

Verified by CazVid11 months agoOpen until: Nov 23, 2026

Salary

$120,000 per year

Location

Santa Clara, California, United States

Employment type

Full time

Workplace

Not provided

Silicon Package Design Engineer in Santa Clara, CA

$120,000 per year

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Job description

SRI Tech Solutions is hiring a Silicon Package Design Engineer for a full-time, on-site role in Santa Clara, California. This position focuses on multi-layer and flip-chip package design, layout automation, and design-rule verification.

Key Responsibilities

  • Perform point-to-point connections for silicon package layouts.
  • Place components and set up design constraints based on provided schematics.
  • Run design rule checks (DRC), identify root causes of violations, and resolve issues.
  • Use Mentor/Siemens and Cadence tools, especially Package Layout Automation (PLA).

Qualifications and Technical Skills

  • Experience designing multi-layer packages and familiarity with flip-chip package design concepts.
  • Understanding of substrate manufacturing design rules and assembly rules.
  • Familiarity with SIPI (Signal Integrity and Power Integrity) rules.
  • Hands-on experience with Mentor/Siemens and Cadence design tools; PLA experience is especially relevant.

Job Details

  • Company: SRI Tech Solutions
  • Location: Santa Clara, California, United States
  • Work arrangement: On-site; not remote eligible
  • Job type: Full-time
  • Pay: $120,000 per year

Frequently asked questions

  • Is this position remote or on-site?

    This role is on-site in Santa Clara, California and is not eligible for remote work.

  • What is the salary for this Silicon Design Package Designer role?

    The salary is USD 120,000 per year.

  • What kind of experience do I need for this job?

    You need hands-on experience in multi-layer package design and proficiency with Mentor/Siemens and Cadence tools for Package Layout Automation.

  • What will my main responsibilities be?

    You will perform point-to-point connections within package layouts, run Design Rule Checks, diagnose and resolve design issues, and execute designs based on schematics including component placement and constraint setup.

  • Are there specific technical skills or knowledge required?

    Yes, you should understand substrate manufacturing Design Rules and Assembly Rules, be familiar with SIPI (Signal Integrity & Power Integrity) Rules, and know flip-chip package design concepts.

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