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Physical Design Engineer (RTL to GDSII)
External job listingat Mindlance
Physical Design Engineer in San Diego, Santa Clara, Austin, and Chandler. Requires RTL-to-GDSII implementation and ASIC backend design. Apply by email.
External source - not verified3 days agoOpen until: Feb 4, 2027
Salary
Not provided
Location
San Diego, United States
Employment type
Full time
Workplace
Not provided
Physical Design Engineer (RTL to GDSII)
San Diego, United States
Job description
Requirements
- Experienced Physical Design Engineers with hands-on expertise in RTL-to-GDSII implementation and ASIC backend design.
- RTL-to-GDSII implementation
- Logic Synthesis, Place & Route (P&R)
- Static Timing Analysis (STA) and Timing Closure
- Synopsys ICC2 and Fusion Compiler
- Synopsys PrimeTime
- Calibre – Physical Verification (DRC/LVS)
- Clock Tree Synthesis (CTS) and Clock Gating
- Floorplanning, Buffer/Repeater Insertion
- Scan Stitching and PPA Optimization
- Verilog/SystemVerilog
How to apply
- Share your updated resume by email.
Location
- San Diego, CA
- Santa Clara, CA
- Austin, TX
- Chandler, AZ